IJSRD - International Journal for Scientific Research & Development| Vol. 2, Issue 06, 2014 | ISSN (online): 2321-0613
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چکیده
one of the most favored way to lessen data complexity is to conceal details or redundant information. Watermarking is a technique which consists in inserting a robust and imperceptible brand in a host image, in order to defend it against illegal plagiarism. Being reversible, the watermarking information like numbers, texts and images can be embedded digital media formats such as Audio, Video and Image. Fragile watermarking techniques i.e. reversible watermarking is one of the most widely used watermarking techniques. This paper represents the work carried on the need of enhancement in performance of reversible watermarking technique that presents the change in fundamental algorithm of this technique. Prediction Error Expansion (PEE) for computing threshold value is tailored with Otsu‟s method which enables equable augmentation in performance measures like PSNR. The PSNR values are checked to evaluate the proposed watermarking technique.
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IJSRD - International Journal for Scientific Research & Development| Vol. 2, Issue 07, 2014 | ISSN (online): 2321-0613
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متن کاملIJSRD - International Journal for Scientific Research & Development| Vol. 2, Issue 06, 2014 | ISSN (online): 2321-0613
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متن کاملIJSRD - International Journal for Scientific Research & Development| Vol. 2, Issue 05, 2014 | ISSN (online): 2321-0613
Abstract— The last decade has witnessed a growing demand for wireless radio spectrum due to the rapid deployment of new wireless devices and applications. Spectrum is a precious resource and thus underutilization of a large part of allocated spectrum is not acceptable. Cognitive Radio(CR) is proposed as a promising solution for increasing spectrum utilization. We conduct simulations to validate...
متن کاملIJSRD - International Journal for Scientific Research & Development| Vol. 2, Issue 06, 2014 | ISSN (online): 2321-0613
The general objective of this paper is to develop methods to reduce the power consumption of arithmetic modules, while maintaining the delay unchanged and keeping the increase in the area to a minimum. Here we illustrate some techniques for a radix-4 divider realized in 0:6_m CMOS technology and compare it with radix-8. We obtained a power consumption reduction of 35% with respect to the standa...
متن کاملIJSRD - International Journal for Scientific Research & Development| Vol. 5, Issue 01, 2017 | ISSN (online): 2321-0613
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